Terabyte Bandwidth Initiative of Rambus
Wednesday, June 3, 2009
Famous Rambus Terabyte Bandwidth Initiative pioneers new memory signaling technologies useful for the development of a future memory architecture capable of delivering a terabyte per second of memory bandwidth to a single System-on-Chip. This unparalleled memory bandwidth will enable future memory systems to benefit from an order of magnitude improvement in 
memory performance.
To achieve 1 TByte/s memory bandwidth, Rambus has developed fundamental innovations that include:-
1. 32X Data Rate - A new memory signaling technology which transmits 32 data bits per input clock cycle;
2. Fully Differential Memory Architecture - Providing the benefits of differential signaling on both the DQ and C/A channels;
3. FlexLink™ C/A - The industry's first full speed, scalable, point-to-point command/address link.
With these innovations and others developed through the Terabyte Bandwidth Initiative, Rambus will provide the foundation for a future memory architecture that offers increased performance, higher and scalable data bandwidth, area optimization, and enhanced signal integrity for gaming, graphics and multi-core computing applications of the next decade.
Posted bySaini at 9:25 AM
Labels: Memories
